A Low-Power Processor Architecture Optimized forWireless Devices.
Aristides EfthymiouJim D. GarsideIoannis PapaefstathiouPublished in: ASAP (2005)
Keyphrases
- low power
- high speed
- single chip
- vlsi architecture
- power consumption
- low power consumption
- low cost
- gate array
- cmos technology
- mixed signal
- cmos image sensor
- high power
- nm technology
- logic circuits
- mobile devices
- vlsi circuits
- wireless transmission
- digital signal processing
- power reduction
- signal processor
- real time
- instruction set
- vlsi implementation
- processing elements
- image sensor
- embedded systems
- multi core processors
- power management
- multithreading
- power dissipation
- design considerations
- data flow
- low complexity
- image processing