Leakage current cancellation technique for low power switched-capacitor circuits.
Louis S. Y. WongShohan HossainAndre WalkerPublished in: ISLPED (2001)
Keyphrases
- low power
- cmos technology
- leakage current
- low voltage
- high speed
- logic circuits
- power consumption
- power dissipation
- power reduction
- delay insensitive
- vlsi circuits
- low cost
- mixed signal
- power line
- single chip
- transmission line
- silicon dioxide
- power supply
- digital signal processing
- low power consumption
- power saving
- super resolution
- digital camera
- image sensor
- data flow
- parallel processing