Verity - A formal verification program for custom CMOS circuits.
Andreas KuehlmannArvind SrinivasanDavid P. LaPotinPublished in: IBM J. Res. Dev. (1995)
Keyphrases
- formal verification
- program slicing
- analog vlsi
- high speed
- delay insensitive
- model checking
- circuit design
- vlsi circuits
- model checker
- bounded model checking
- symbolic model checking
- automated verification
- domain specific
- low cost
- low voltage
- computer programs
- focal plane
- cmos technology
- asynchronous circuits
- fault localization
- low power
- chip design
- power consumption
- power dissipation
- digital circuits
- temporal logic
- parallel processing
- floating gate
- artificial intelligence