A low-area interconnect architecture for chip multiprocessors.
Zhiyi YuBevan M. BaasPublished in: ISCAS (2008)
Keyphrases
- high speed
- multithreading
- parallel architecture
- vlsi implementation
- real time
- low cost
- management system
- power dissipation
- design considerations
- low power consumption
- analog vlsi
- host computer
- cmos technology
- parallel computing
- network architecture
- low power
- reconfigurable hardware
- random access memory
- chip design
- cmos image sensor