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All-Digital Closed-Loop Unified Retention/Wake-Up Clamp in a 10nm 4-Core x86 IP.

Charles AugustineA. AfzalU. MisgarA. OwahidA. RamanK. SubramanianFeroze MerchantJames W. TschanzMuhammad M. Khellah
Published in: VLSI Circuits (2021)
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