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Design of an all-digital temperature sensor in 28 nm CMOS using temperature-sensitive delay cells and adaptive-1P calibration for error reduction.
Shang-Yi Li
Pei-Yuan Chou
Jinn-Shyan Wang
Published in:
ASP-DAC (2016)
Keyphrases
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circuit design
error reduction
cmos image sensor
analog to digital converter
metal oxide semiconductor
active learning
decision trees
similarity measure
significant improvement
linear programming
maximum likelihood
test set
low power
power dissipation
mixed signal