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An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform.

Kailash Chandra RayM. V. N. V. PrasadAnindya Sundar Dhar
Published in: J. Signal Process. Syst. (2018)
Keyphrases
  • vlsi architecture
  • fractional fourier transform
  • vlsi implementation
  • low complexity
  • real time
  • low power
  • log polar
  • image analysis
  • template matching
  • low cost
  • high speed
  • frequency domain
  • power consumption