Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture.
Ken NakamuraYuya OmoriDaisuke KobayashiTatsuya OsawaTakayuki OnishiKoyo NittaHiroe IwasakiAtsushi ShimizuPublished in: COOL CHIPS (2019)
Keyphrases
- parallel processing
- low delay
- distributed video coding
- low complexity
- distributed processing
- video codec
- wyner ziv video coding
- video coding
- parallel architecture
- wyner ziv
- computational power
- parallel computers
- real time
- video coding standard
- video compression
- coding efficiency
- high speed
- rate distortion
- coding scheme
- motion compensated
- turbo codes
- motion vectors
- motion compensation
- graphic processing unit
- transform domain
- motion estimation
- computational complexity
- mode decision
- video coding scheme
- video sequences
- rate control
- video quality
- frame rate
- bit rate
- rate allocation
- bit plane
- error concealment
- image coding