A Novel Error Detection Strategy for a Low Power Low Noise All-Digital Phase-Locked Loop.
Umakanta NandaPublished in: J. Low Power Electron. (2016)
Keyphrases
- low power
- error detection
- phase locked loop
- mixed signal
- power consumption
- high speed
- low power consumption
- low cost
- error correction
- error recovery
- vlsi circuits
- single chip
- error correcting
- fault tolerance
- logic circuits
- vlsi architecture
- error resilient
- digital signal processing
- multipath
- cmos image sensor
- real time
- high voltage
- power dissipation
- image sensor
- signal to noise ratio
- power reduction
- load balancing
- sensor networks
- low density parity check
- expert systems