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Exploration of robustness limits and ESD EMI impact in a protection device for advanced CMOS technology.

Philippe GalyWim Schoenmaker
Published in: Microelectron. Reliab. (2017)
Keyphrases
  • cmos technology
  • low power
  • spl times
  • low voltage
  • power consumption
  • power dissipation
  • pattern recognition
  • low cost
  • parallel processing