Sizing of Clock Distribution Networks for High Performance CPU Chips.

Madhav P. Desai Radenko Cvijetic James Jensen

Published in: DAC (1996)

Keyphrases

distribution networks
high speed
pc cluster
graphics processing units
power consumption
low latency
low power
lead time
high efficiency
integrated circuit
high end
scientific computing
cost effective
high density
fine grained
high reliability
decision making