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A low power VLIW processor generation method by means of extracting non-redundant activation conditions.
Hirofumi Iwato
Keishi Sakanushi
Yoshinori Takeuchi
Masaharu Imai
Published in:
CODES+ISSS (2007)
Keyphrases
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low power
generation method
high speed
single chip
power consumption
low cost
gate array
high power
digital signal processing
logic circuits
wireless transmission
vlsi architecture
low power consumption
vlsi circuits
cmos technology
power reduction
signal processor
image sensor