Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers.
Iyad OuaissRanga VemuriPublished in: DATE (2001)
Keyphrases
- hardware implementation
- field programmable gate array
- smart camera
- memory space
- hierarchical model
- database
- hierarchical structure
- hardware design
- limited memory
- computing power
- reconfigurable architecture
- coarse to fine
- general purpose
- computer technology
- ontology mapping
- associative memory
- memory requirements
- memory management
- multithreading
- memory size
- program synthesis
- compute intensive
- image processing