Leakage Control Techniques for Designing Robust, Low Power Wide-OR Domino Logic for sub-130 nm CMOS Technologies.
Bhaskar ChatterjeeManoj SachdevRam KrishnamurthyPublished in: ISQED (2004)
Keyphrases
- low power
- cmos technology
- power consumption
- low cost
- high speed
- delay insensitive
- logic circuits
- nm technology
- vlsi circuits
- high power
- wireless transmission
- low power consumption
- single chip
- image sensor
- mixed signal
- low voltage
- digital signal processing
- power reduction
- hardware and software
- ultra low power
- vlsi architecture
- real time
- metal oxide semiconductor
- silicon on insulator
- gate array