A heuristic algorithm for LUT-based FPGA technology mapping using the lower bound for DAG covering problem (abstract only).
Taiga TakataYusuke MatsunagaPublished in: FPGA (2010)
Keyphrases
- lower bound
- fpga technology
- upper bound
- branch and bound algorithm
- branch and bound
- objective function
- directed acyclic graph
- worst case
- lower and upper bounds
- optimal solution
- np hard
- hardware implementation
- mapping function
- multi agent systems
- data processing
- online algorithms
- application development
- real time
- high level
- case study