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Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks.
Benoit Nadeau-Dostie
Kiyoshi Takeshita
Jean-Francois Cote
Published in:
ITC (2008)
Keyphrases
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high speed
power dissipation
power consumption
data mining
real time
databases
neural network
test cases
analog circuits
scan data
hardware software co design