Login / Signup

Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks.

Benoit Nadeau-DostieKiyoshi TakeshitaJean-Francois Cote
Published in: ITC (2008)
Keyphrases
  • high speed
  • power dissipation
  • power consumption
  • data mining
  • real time
  • databases
  • neural network
  • test cases
  • analog circuits
  • scan data
  • hardware software co design