FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL.
Hasitha Muthumala WaidyasooriyaMasanori HariyamaPublished in: ICIS (2016)
Keyphrases
- field programmable gate array
- pipelined architecture
- hardware implementation
- parallel computing
- embedded systems
- hardware design
- hardware architecture
- image processing algorithms
- parallel implementation
- graphics processing units
- massively parallel
- transactional memory
- computing systems
- shared memory
- parallel architectures
- signal processing
- parallel programming
- parallel algorithm
- high level
- data sets
- application specific
- source code
- low cost
- deep learning
- general purpose
- case study
- artificial intelligence
- neural network