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Reducing Test Application Time and Power Dissipation for Scan-Based Testing via Multiple Clock Disabling.

Kuen-Jong LeeJih-Jeen Chen
Published in: Asian Test Symposium (2002)
Keyphrases
  • power consumption
  • test cases
  • power reduction
  • software testing
  • neural network
  • pattern recognition
  • high speed
  • low power
  • power dissipation