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Testing of a source address validation protocol with parallel parameterized extended finite state machines.
Jiangyuan Yao
Zhiliang Wang
Xia Yin
Jianping Wu
Published in:
AINTEC (2011)
Keyphrases
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finite state machines
finite state automata
model checking
parallel processing
parallel implementation
lightweight
database systems
hidden markov models
parallel computing
formal analysis
digital circuits
regular languages
model based testing
mutation testing