Timing analysis and optimization of voltage scaled CMOS digital circuits with dual-Vth devices.
Anne Lorraine S. LunaJohn Richard E. HizonLouis P. AlarcónPublished in: APCCAS (2014)
Keyphrases
- digital circuits
- circuit design
- power supply
- low cost
- optimization algorithm
- low voltage
- evolvable hardware
- mixed signal
- optimization problems
- mobile devices
- high speed
- finite state machines
- power losses
- model based diagnosis
- data flow
- database
- integrity constraints
- decision diagrams
- power system
- relational databases
- analog vlsi
- functional decomposition