Customizing Reconfigurable On-Chip Crossbar Scheduler.
Jae Young HurTodor P. StefanovStephan WongStamatis VassiliadisPublished in: ASAP (2007)
Keyphrases
- scheduling algorithm
- low cost
- high speed
- reconfigurable hardware
- analog vlsi
- functional units
- systolic array
- single chip
- programmable logic
- low power
- hardware implementation
- response time
- high density
- field programmable gate array
- general purpose
- reconfigurable architecture
- circuit design
- vlsi design
- real time
- hardware and software
- modular design
- power reduction
- power dissipation
- evolvable hardware
- printed circuit boards
- resource utilization
- parallel computing
- data flow
- digital signal
- host computer
- neural network