The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture
Andrea BiagioniFrancesca Lo CiceroAlessandro LonardoPier Stanislao PaolucciMersia PerraDavide RossettiCarlo SidoreFrancesco SimulaLaura TosorattoPiero ViciniPublished in: CoRR (2012)
Keyphrases
- network architecture
- high speed
- distributed network
- single chip
- high density
- ibm power processor
- artificial neural
- low cost
- neural network
- functional verification
- chip design
- programmable logic
- physical design
- processor core
- random access memory
- level parallelism
- analog vlsi
- multithreading
- neural network model
- memory subsystem
- ibm zenterprise
- service integration
- low power
- vlsi implementation
- parallel processing
- circuit design
- input output
- activation function