Login / Signup
Reducing power dissipation in pipelined accumulators.
Gian Carlo Cardarilli
Alberto Nannarelli
Marco Re
Published in:
ACSCC (2008)
Keyphrases
</>
power dissipation
power reduction
power consumption
low power
cmos technology
digital signal processing
power saving
logic circuits
data flow
low cost
chip design
design methodology
short circuit
machine learning
computer vision
finite state machines
signal processing
network on chip