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A 65nm low-power embedded DRAM with extended data-retention sleep mode.

Takeshi NagaiMasaharu WadaHitoshi IwaiMariko KakuAtsushi SuzukiTomohisa TakaiNaoko ItogaTakayuki MiyazakiHiroyuki TakenakaTakehiko HojoShinji Miyano
Published in: ISSCC (2006)
Keyphrases
  • low power
  • power consumption
  • high speed
  • low cost
  • cmos technology
  • computer systems