Login / Signup
Memory design using a one-transistor gain cell on SOI.
Takashi Ohsawa
Katsuyuki Fujita
Tomoki Higashi
Yoshihisa Iwata
Takeshi Kajiyama
Yoshiaki Asao
Kazumasa Sunouchi
Published in:
IEEE J. Solid State Circuits (2002)
Keyphrases
</>
design process
user interface
computational complexity
low cost
memory requirements
design principles
design methodology
manufacturing cell