Circuit partitioning with coupled logic restructuring techniques.
Yu-Liang WuXiao-Long YuanDavid Ihsin ChengPublished in: ASP-DAC (2000)
Keyphrases
- digital circuits
- delay insensitive
- logic synthesis
- logic circuits
- chip design
- analog circuits
- classical logic
- micron cmos
- asynchronous circuits
- high speed
- logic programming
- modal logic
- computational properties
- information systems
- abductive reasoning
- predicate logic
- circuit design
- low power
- partitioning algorithm
- graph partitioning
- defeasible logic
- automated reasoning
- data sets
- truth table
- tunnel diode
- sound and complete axiomatization
- database