Low-power architectural synthesis and the impact of exploiting locality.

Renu Mehra Lisa M. Guerra Jan M. Rabaey

Published in: J. VLSI Signal Process. (1996)

Keyphrases

low power
power consumption
low cost
high speed
single chip
high power
logic circuits
low power consumption
vlsi circuits
wireless transmission
digital signal processing
vlsi architecture
cmos technology
hardware and software
delay insensitive