Bitwidth-aware high-level synthesis for designing low-power DSP applications.
Ghizlane Lhairech-LebretonPhilippe CoussyDominique HellerEric MartinPublished in: ICECS (2010)
Keyphrases
- low power
- digital signal processing
- high level synthesis
- high speed
- low cost
- power consumption
- low power consumption
- single chip
- wireless transmission
- logic circuits
- high power
- cmos technology
- signal processing
- parallel architecture
- image processing
- vlsi circuits
- image sensor
- vlsi architecture
- power reduction
- mixed signal
- real time
- delay insensitive
- parallel implementation