Reducing power, area, and delay of threshold logic gates considering non-integer weights.
Seyed Nima MozaffariSpyros TragoudasThemistoklis HaniotakisPublished in: ISCAS (2017)
Keyphrases
- logic circuits
- power dissipation
- power consumption
- power reduction
- low power
- chip design
- threshold selection
- modal logic
- relative importance
- weighting scheme
- linear combination
- weighted sum
- threshold values
- logic programming
- neural network
- roc curve
- data sets
- multi valued
- defeasible logic
- digital circuits
- description logics
- proof theory
- high speed
- adaptive threshold
- low cost