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Ultra-Low-Power and Performance-Improved Logic Circuit Using Hybrid TFET-MOSFET Standard Cells Topologies and Optimized Digital Front-End Process.

Zhixuan WangLe YeQianqian HuangKaixuan DuZhichao TanYangyuan WangRu Huang
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
Keyphrases
  • process model
  • circuit design
  • real time
  • genetic algorithm
  • back end
  • digital circuits
  • asynchronous circuits
  • delay insensitive