Login / Signup
Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits.
Tetsuro Matsuno
Daisuke Kosaka
Makoto Nagata
Published in:
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2010)
Keyphrases
</>
digital circuits
power consumption
circuit design
data flow
high speed
low power
signal to noise ratio
evolvable hardware
noise reduction
infrared
noisy data
dynamic programming
model based diagnosis
optimal solution
multi agent
focal plane
reinforcement learning