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Implementation of a self-resetting CMOS 64-bit parallel adder with enhanced testability.

Wei HwangGeorge Diedrich GristedePia SandaShao Y. WangDavid F. Heidel
Published in: IEEE J. Solid State Circuits (1999)
Keyphrases
  • bit parallel
  • pattern matching
  • regular expressions
  • high speed
  • power supply
  • database
  • real time
  • neural network
  • circuit design