Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks.
Zhanping ChenMark JohnsonLiqiong WeiKaushik RoyPublished in: ISLPED (1998)
Keyphrases
- power dissipation
- power consumption
- low power
- cmos technology
- high speed
- power reduction
- vlsi circuits
- chip design
- accurate estimation
- low cost
- logic circuits
- circuit design
- digital signal processing
- finite state machines
- power management
- high accuracy
- floating gate
- power saving
- delay insensitive
- error analysis
- highly accurate
- mixed signal
- equivalent circuit
- flip flops
- single chip
- estimation algorithm
- density estimation
- parameter estimation
- computationally efficient