Test set embedding into low-power sequences based on a traveling salesman problem formulation.
Ioannis VoyiatzisCostas EfstathiouDimitris MagosCleo SgouropoulouPublished in: DTIS (2012)
Keyphrases
- test set
- traveling salesman problem
- low power
- valid inequalities
- power consumption
- low cost
- high speed
- error rate
- combinatorial optimization
- training set
- ant colony optimization
- subtour elimination
- single chip
- test data
- optimization problems
- vlsi circuits
- training data
- hamiltonian cycle
- logic circuits
- traveling salesman
- vlsi architecture
- low power consumption
- cost function
- data sets
- power reduction
- gate array
- mixed signal
- image sensor
- simulated annealing
- evolutionary algorithm
- neural network