FPGA-Based Ordered Statistic Decoding Architecture for B5G/6G URLLC IIOT Networks.
Changhyeon KimDongyoung RimJeongwon ChoeDongyun KamGiyoon ParkSeokki KimYoungjoo LeePublished in: A-SSCC (2021)
Keyphrases
- management system
- hardware design
- social networks
- real time
- hardware architecture
- network design
- polynomial neural networks
- hardware implementation
- network model
- application specific
- cellular networks
- network structure
- hardware architectures
- network analysis
- efficient implementation
- community structure
- decoding algorithm
- smart camera
- software architecture