A Power Minimization Technique for Arithmetic Circuits by Cell Selection.

Masanori Muroyama Tohru Ishihara Akihiko Hyodo Hiroto Yasuura

Published in: VLSI Design (2002)

Keyphrases

neural network
power consumption
objective function
selection algorithm
power reduction
genetic algorithm
selection strategy
quantum computing
analog vlsi
chip design
website
selection criteria
power dissipation
arithmetic operations
microscopic images