Login / Signup
Equalization of multi-Gb/s chip-to-chip interconnects affected by manufacturing tolerances.
Jelle Bailleul
Lennert Jacobs
Paolo Manfredi
Dries Vande Ginste
Marc Moeneclaey
Published in:
Comput. Electr. Eng. (2017)
Keyphrases
</>
high speed
low cost
analog vlsi
high density
power dissipation
vlsi implementation
cmos technology
printed circuit boards
single chip
vlsi design
input output
low power
physical design
circuit design
data sets
multiscale
decision making
genetic algorithm