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A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops.
Francesco Centurelli
Giuseppe Scotti
Gaetano Palumbo
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2021)
Keyphrases
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flip flops
low voltage
cmos technology
low power
power dissipation
power consumption
power line
parallel processing
high speed
multiple input
low cost
image sensor
digital images
design considerations
power management
object oriented
computer vision