A Genetic Algorithm Hardware Accelerator for VLSI Circuit Partitioning.
Shawki AreibiMedhat MoussaG. KoonarPublished in: Int. J. Comput. Their Appl. (2005)
Keyphrases
- genetic algorithm
- chip design
- gate array
- circuit design
- high speed
- vlsi implementation
- digital circuits
- single chip
- vlsi circuits
- field programmable gate array
- low cost
- low power
- real time
- vlsi architecture
- evolvable hardware
- data acquisition
- power dissipation
- multi objective
- hardware description language
- parallel implementation
- neural network
- hardware and software
- artificial neural networks
- evolutionary computation
- hardware implementation
- fitness function
- power consumption
- design methodology
- evolutionary algorithm
- fuzzy logic
- physical design
- embedded systems
- signal processing
- logic circuits
- vlsi design
- computing systems
- simulated annealing
- power reduction
- electronic circuits
- genetic programming
- partitioning algorithm
- analog circuits
- metaheuristic
- hardware architecture
- genetic algorithm ga
- computer systems
- random number generator
- hardware design
- processor array
- computer architecture