On the trade-off between power and flexibility of FPGA clock networks.
Julien LamoureuxSteven J. E. WiltonPublished in: ACM Trans. Reconfigurable Technol. Syst. (2008)
Keyphrases
- trade off
- power consumption
- high speed
- power reduction
- duty cycle
- low power
- real time
- network analysis
- hardware implementation
- computational power
- fpga device
- heterogeneous networks
- signal processing
- data sets
- computer networks
- network design
- complex networks
- field programmable gate array
- telecommunication networks
- network topologies
- software implementation
- power grid
- power saving
- low power consumption
- social networks