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Process Variation Aware Bus-Coding Scheme for Delay Minimization in VLSI Interconnects.
Chittarsu Raghunandan
K. S. Sainarayanan
M. B. Srinivas
Published in:
ISQED (2008)
Keyphrases
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coding scheme
high speed
bitstream
coding method
transform coding
long term
error resilient
power dissipation
joint source channel