FinFET-Based Low Power Address Decoder under Process Variation.

Mukesh Chaturvedi Akanksha Bhadoria Vikas Mahor Manisha Pattanaik

Published in: iNIS (2016)

Keyphrases

low power
high speed
low cost
power consumption
vlsi circuits
low complexity
logic circuits
vlsi architecture
high power
real time
image processing
signal processing
single chip
wireless transmission
gate array