Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology.

Fabian Olivera Antonio Petraglia

Published in: Microelectron. J. (2018)

Keyphrases

cmos technology
silicon on insulator
trade off
low power
power consumption
low voltage
spl times
parallel processing
power dissipation
dynamic random access memory
low cost
image sensor
high speed
embedded dram
mixed signal
image processing
machine vision
ibm power processor
pattern recognition