Low-power asynchronous digital pipeline based on mismatch-tolerant logic gates.
Lizeth Gonzalez-CarabarinTetsuya AsaiMasato MotomuraPublished in: IEICE Electron. Express (2014)
Keyphrases
- low power
- logic circuits
- mixed signal
- delay insensitive
- power consumption
- high speed
- low cost
- vlsi circuits
- high power
- single chip
- low power consumption
- power dissipation
- digital signal processing
- wireless transmission
- gate array
- image sensor
- vlsi architecture
- cmos technology
- asynchronous circuits
- real time
- energy dissipation
- analog to digital converter