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Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies.

Saibal MukhopadhyayRahul M. RaoJae-Joon KimChing-Te Chuang
Published in: ISCAS (2008)
Keyphrases
  • positive and negative
  • design principles
  • data mining
  • steady state
  • user interface
  • computational intelligence
  • low cost
  • design tools
  • human factors
  • design considerations
  • block cipher
  • random access memory