High density bit-serial FPGA with LUT embedding shift register function.
Tsuyoshi IsshikiAkihisa OhtaT. WatanabeT. NakadaK. AkahaneI. SislaDongju LiHiroaki KuniedaPublished in: APCCAS (1) (2002)
Keyphrases
- high density
- shift register
- hardware implementation
- high speed
- magnetic tape
- low density
- random number generator
- close proximity
- magnetic recording
- high power
- data center
- signal processing
- low power
- efficient implementation
- field programmable gate array
- high bandwidth
- hardware architecture
- real time
- plasma etching
- image processing
- databases