Incremental column-wise verification of arithmetic circuits using computer algebra.
Daniela KaufmannArmin BiereManuel KauersPublished in: Formal Methods Syst. Des. (2020)
Keyphrases
- computer algebra
- asynchronous circuits
- theorem prover
- model checking
- delay insensitive
- incremental clustering
- incremental learning
- high speed
- face verification
- computer algebra systems
- functional verification
- pairwise
- temporal logic
- data driven
- vlsi circuits
- analog circuits
- first order logic
- knowledge representation
- high level synthesis
- learning algorithm
- data sets