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A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture.
Sandeep K. Gupta
Michael A. Inerfield
Jingbo Wang
Published in:
IEEE J. Solid State Circuits (2006)
Keyphrases
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high bandwidth
power consumption
low latency
analog to digital converter
end to end
high density
application specific
real time
ibm eservertm
high throughput
mobile terminals
high speed
cost effective
virtual machine