Implementation of Concurrent Checking Circuits by Independent Sub-circuits.
Vladimir OstrovskyIlya LevinPublished in: DFT (2005)
Keyphrases
- circuit design
- high level synthesis
- high speed
- digital circuits
- logic synthesis
- delay insensitive
- analog vlsi
- cmos technology
- tunnel diode
- lateral inhibition
- asynchronous circuits
- analog circuits
- implementation details
- data sets
- search algorithm
- data structure
- database systems
- decision trees
- e learning
- quantum computing
- computer vision
- artificial intelligence
- floating gate
- neural network
- real time