A novel soft error tolerant FPGA architecture.

Motoki Amagasaki Yuji Nakamura Takuya Teraoka Masahiro Iida Toshinori Sueyoshi

Published in: VLSI-SoC (2016)

Keyphrases

error tolerant
graph matching
hardware architecture
hardware implementation
xilinx virtex
subgraph isomorphism
machine learning
image retrieval
pipelined architecture
databases
data collection